Computer instructions are generally stored in a memory coupled to the central processor (CPU) of a computer system. Some instructions involve branching. Branching can be conditional or unconditional.
A branch target instruction is the instruction that is fetched by the processor (CPU) when executing a branch instruction. Usually, during the execution of a branch instruction, the CPU outputs the address of the branch target instruction to instruction memory. This address is known as the "branch target address" and is a part of any branch instruction. The size of each instruction can vary for various reasons, including using compression coding. Pointers are employed to point to the locations in memory where various parts of instructions are stored. It is often the case that parts of an instruction are stored at different locations in memory necessitating the use of multiple pointers to locate the various parts.
When there is a need to branch to a branch target instruction, there is a need to know all the pointers of the branch target instruction. Storing all the pointers of the branch target instruction within a branch instruction can cause several problems. For example, it can make the branch instruction very long, and require more than one read cycle in order to read and process it. Also, a long branch instruction allows very few bits for pointers, so that there is very limited branching space.
Thus, there is an ongoing need for improved computers and computer memory organization and operating methods which reduce or eliminate these and other well known limitations of the prior art in employing or implementing branching instructions.